10.17863/CAM.55708
Bang, Sang Yun
0000-0002-4317-0574
Mocanu, Felix C
Lee, Tae Hoon
Yang, Jiajie
Zhan, Shijie
Jung, Sung-Min
0000-0002-8365-7512
Shin, Dong-Wook
0000-0002-5182-1816
Suh, Yo-Han
Fan, Xiang-Bing
Lee, Sanghyo
Choi, Hyung Woo
0000-0003-0115-2412
Occhipinti, Luigi G
Han, Soo Deok
Kim, Jong Min
Robust In-Zn-O Thin-Film Transistors with a Bilayer Heterostructure Design and a Low-Temperature Fabrication Process Using Vacuum and Solution Deposited Layers.
American Chemical Society (ACS)
2020
3403 Macromolecular and Materials Chemistry
40 Engineering
34 Chemical Sciences
Apollo - University of Cambridge Repository
University of Cambridge
013meh722
2020-07-30
2020-07-30
2020-09-01
eng
Article
https://www.repository.cam.ac.uk/handle/1810/308619
10.1021/acsomega.0c02225
All rights reserved
open.access
We report on the design, fabrication, and characterization of heterostructure In-Zn-O (IZO) thin-film transistors (TFTs) with improved performance characteristics and robust operation. The heterostructure layer is fabricated by stacking a solution-processed IZO film on top of a buffer layer, which is deposited previously using an electron beam (e-beam) evaporator. A thin buffer layer at the dielectric interface can help to template the structure of the channel. The control of the precursors and of the solvent used during the sol-gel process can help lower the temperature needed for the sol-gel condensation reaction to proceed cleanly. This boosts the overall performance of the device with a significantly reduced subthreshold swing, a four-fold mobility increase, and a two-order of magnitude larger on/off ratio. Atomistic simulations of the a-IZO structure using molecular dynamics (both classical and ab initio) and hybrid density functional theory (DFT) calculations of the electronic structure reveal the potential atomic origin of these effects.
EPSRC
EP/P027628/1
Engineering and Physical Sciences Research Council
EP/P027628/1
European Commission Horizon 2020 (H2020) Research Infrastructures (RI)
685758